An interesting interview question for architecture positions is how to measure the instruction window size. To answer this question, you need to have a full understanding of the modern OOO microarchitecture. Instruction window refers to the maximum number of instructions which can execute out-of-order in a processor. It is bounded by the reorder buffer (ROB) size. The reorder buffer is used for in-order instruction commit to implement precise exception. In the pipeline, during assigning entry to the reservation station, an entry in reorder buffer will be allocated and the destination register will be renamed with the reservation station entry tag (basically a reservation station entry ID). Once the instruction is executed, it will broadcast to ROB and reservation station to notify the finish of the instruction and data dependancy. The ROB will be constantly checked and deallocated in-order to commit the instructions in-order.
So, back to the question, how should we measure the instruction window size or, ROB size? The idea is to use latency measurement of a load instruction (make sure it’s not hit in cache). If multiple loads fell in the reorder buffer, the latency will be hidden due to load parallelism. The trick is to stuff some instructions (nops for example) between load instructions and by tweaking the number of stuffed instructions between two load instructions and measure the average load latency (again, make sure the load is missed from cache). You should observe a sharp increase of the latency (only 1 load instruction filled in ROB). The changing point can tell you the ROB size (how many stuffed instructions).
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